The present invention relates to semiconductor power device technology and more particularly to improved trench vertical MOSFET devices and fabrication processes for forming such devices.
Semiconductor packages are well known in the art. These packages can sometimes include one or more semiconductor devices, such as an integrated circuit (IC) device, die or chip. The IC devices can include electronic circuits that have been manufactured on a substrate made of semiconductor material. The circuits are made using many known semiconductor processing techniques such as deposition, etching photolithography, annealing, doping and diffusion. Silicon wafers are typically used as the substrate on which these IC devices are formed.
An example of a semiconductor device is a metal oxide silicon field effect transistor (MOSFET) device, which is used in numerous electronic apparatuses including power supplies, automotive electronics, computers and disc drives. MOSFET devices can be used in a variety of application such as switches that connect power supplies to particular electronic devices having a load. MOSFET devices can be formed in a trench that has been etched into a substrate or onto an epitaxial layer that has been deposited onto a substrate.
MOSFET devices operate by applying an appropriate threshold voltage to a gate electrode of a MOSFET device which turns the device ON and forms a channel connecting a source and a drain of the MOSFET allowing a current to flow. Once the MOSFET device is turned on, the relation between the current and the voltage is nearly linear which means that the device behaves like a resistor. When the MOSFET device is turned OFF (i.e. in an off state), the voltage blocking capability is limited by the breakdown voltage. In high power applications, it is desirable to have a high breakdown voltage, for example, 600V or higher, while still maintaining low on state specific resistance Rsp.
Techniques that are employed to achieve threshold voltages in the range for useful operation (i.e. preventing channel accumulation at zero applied gate voltage) can reduce on state specific resistance. Therefore, what is needed is a cost effective way of reducing on state specific resistance while still achieving threshold voltages that are in a range for useful operation.